The present invention relates to a frequency-voltage conversion circuit and applications thereof, and a delay amount determination circuit.
Conventionally, in designing a semiconductor integrated circuit (LSI), specifications of the LSI (for example, the minimum power supply voltage, maximum operating frequency and the like of the LSI) have been determined in consideration of the worst conditions for process fluctuations and temperature fluctuations.
In the case where the LSI is operated at a frequency lower than the maximum operating frequency, or in the case where the processing capability of the LSI is changed by the temperature fluctuations, it should be possible to operate the LSI at a voltage lower than the minimum power supply voltage based on the specifications of the LSI. However, the power supply voltage supplied to the LSI has been fixed regardless of the operating environment of the LSI. Accordingly, the power consumption of the LSI has been partially wasted.
One objective of the present invention is to provide an adjustable frequency-voltage conversion circuit adaptable to a characteristic of a target circuit.
Another objective of the present invention is to provide a system including a frequency-voltage conversion circuit for supplying a minimum operating voltage required for the target circuit to normally operate.
Still another objective of the present invention is to provide a method for adjusting an input and output characteristic of the frequency-voltage conversion circuit of the system.
Still another objective of the present invention is to provide an apparatus for automatically adjusting the input and output characteristic of the frequency-voltage conversion circuit of the system.
Still another object of the present invention is to provide a delay amount determination circuit having a simple structure suitable to be used in the frequency-voltage conversion circuit.
A frequency-voltage conversion circuit according to the present invention receives a clock as an input and provides a voltage in accordance with a frequency of the clock as an output. An input and output characteristic of the frequency-voltage conversion circuit is adjustable so as to substantially match a given input and output characteristic. Thus, the above-described objectives are achieved.
The frequency-voltage conversion circuit may be configured to allow a slope and an offset amount of the input and output characteristic of the frequency-voltage conversion circuit to be adjustable.
Another frequency-voltage conversion circuit according to the present invention includes an input pulse signal generation circuit for generating an input pulse signal having a pulse width representing a target delay amount in accordance with a frequency of a clock; a delay circuit for delaying the input pulse signal, the delay circuit outputting a pulse signal obtained by delaying the input pulse signal as an output pulse signal; and a delay amount-voltage conversion circuit for outputting a voltage corresponding to the target delay amount based on a delay amount of the output pulse signal with respect to the input pulse signal and supplying the voltage to the delay circuit. The delay circuit delays the input pulse signal in accordance with the voltage which is output from the delay amount-voltage conversion circuit. Thus, the above-described objectives are achieved.
The input pulse signal generation circuit may intermittently generate the input pulse signals.
A cycle by which the input pulse signals are intermittently generated may be variable.
The input pulse signal generation circuit may stop generation of the input pulse signal in a specific mode.
The delay circuit may be configured to allow a delay time periodxe2x80x94power supply voltage characteristic of the delay circuit to be adjustable.
The delay circuit may be configured to allow a slope and an offset amount of a delay time periodxe2x80x94power supply voltage characteristic of the delay circuit to be adjustable.
The delay circuit may include a first delay block which operates in accordance with the voltage which is output from the delay amount-voltage conversion circuit. The first delay block may include a plurality of first delay units. A stage number of the first delay units, among the plurality of first delay units through which the input pulse signal passes, may be adjusted in accordance with a first delay control signal.
The delay circuit may further include a second delay block which operates in accordance with a prescribed fixed voltage. The second delay block may include a plurality of second delay units. A stage number of the second delay units, among the plurality of second delay units through which the input pulse signal passes, may be adjusted in accordance with a second delay control signal.
The pulse width of the input pulse signal may be determined as a function of the frequency of the clock.
The function may be represented by Pw=xcex1/f+xcex2, where Pw is the pulse width of the input pulse signal, f is the frequency of the clock, and xcex1 and xcex2 are constants.
The delay amount-voltage conversion circuit may feedback-control the output voltage so as to increase the output voltage when the delay amount of the output pulse signal with respect to the input pulse signal is larger than the target delay amount and decrease the output voltage when the delay amount of the output pulse signal with respect to the input pulse signal is smaller than the target delay amount.
The delay amount-voltage conversion circuit may include a determination circuit for determining whether or not the delay amount of the output pulse signal with respect to the input pulse signal is larger than the target delay mount and outputting a determination signal indicating the determination result; and a voltage selection circuit for selectively outputting one of a plurality of voltages in accordance with the determination result.
The voltage selection circuit may include a bidirectional shift control circuit for shifting data specifying one voltage to be selected among the plurality of voltages in a direction corresponding to the determination signal; and a switch circuit for selecting one of the plurality of voltages based on the data.
The voltage selection circuit may output the highest voltage among the plurality of voltages as an initial output voltage.
The voltage selection circuit may include a resistor, where one end of the resistor is connected to a high potential, the other end of the resistor is connected to a low potential, and the plurality of voltages are obtained by dividing the resistor.
The voltage selection circuit may further include a switch connected to the resistor in series, and the switch is turned off in a specific mode.
The bidirectional shift control circuit may include a plurality of stages of units, and each of the plurality of stages of units may include a memory circuit storing the data and a 2-input, 1-output selector. An output of the selector included in a specific-stage unit among the plurality of stages of units may be connected to the memory circuit. An input of the selector included in the specific-stage unit among the plurality of stages of units may be connected to the memory circuit included in the unit immediately previous to the specific-stage unit and the memory circuit included in the unit immediately subsequent to the specific-stage unit. The selector included in each of the plurality of stages of units may be controlled by the determination signal.
The bidirectional shift control means may further include means for preventing deletion of the data stored in the memory circuit included in the frontmost-stage unit among the plurality of stages of units; and means for preventing deletion of the data stored in the memory circuit included in the rearmost-stage unit among the plurality of stages of units.
The delay amount-voltage conversion circuit may further include means for storing the output voltage immediately previous to a present output voltage. The delay amount-voltage conversion circuit may output the present voltage as a first output voltage and may output one of the present voltage or the output voltage immediately previous to the present output voltage as a second output voltage. The first output voltage may be supplied to the delay circuit.
The delay amount-voltage conversion circuit may further include means for storing an initial output voltage. The delay amount-voltage conversion circuit may output the present voltage as a first output voltage and may output the initial output voltage as a second output voltage. The first output voltage may be supplied to the delay circuit. The initial output voltage may be updated to the present output voltage when the present output voltage is increased.
A delay amount determination circuit according to the present invention includes an input pulse signal generation circuit for generating an input pulse signal having a pulse width representing a target delay amount; a delay circuit for delaying the input pulse signal, the delay circuit outputting a pulse signal obtained by delaying the input pulse signal as an output pulse signal; and an determination circuit for determining whether or not the delay amount of the output pulse signal with respect to the input pulse signal is larger than the target delay mount and outputting a determination signal indicating the determination result. Thus, the above-described objectives are achieved.
The pulse width of the input signal may be variably adjustable.
The determination circuit may include a data latch circuit receiving the input pulse signal as a clock input and the output pulse signal as a data input, and an output from the data latch circuit may be output as the determination signal.
A system according to the present invention includes a target circuit which operates in accordance with a clock and a power management circuit for supplying a minimum voltage required for the target circuit to be operable in accordance with a frequency of the clock. The power management circuit includes the above-described frequency-voltage conversion circuit. The power management circuit supplies the voltage which is output from the frequency-voltage conversion circuit as the minimum voltage. Thus, the above-described objectives are achieved.
The system may be formed on a single semiconductor chip.
The power management circuit may further include voltage conversion means for converting a given power supply voltage into the voltage which is output from the frequency-voltage conversion circuit, and the power management circuit may provide a target circuit with an output from the voltage conversion means as the minimum voltage.
Another system according to the present invention includes a target circuit which operates in accordance with a clock and a frequency-voltage conversion circuit for receiving the clock as an input and providing a voltage in accordance with a frequency of the clock as an operating voltage for the target circuit, and system being characterized in that an input and output characteristic of the frequency-voltage conversion circuit is adjustable so that the voltage which is output from the frequency-voltage conversion circuit substantially matches a minimum voltage required for the target circuit to be operable at the frequency of the clock. Thus, the above-described objectives are achieved.
The target circuit may have a plurality of different delay time periodxe2x80x94power supply voltage characteristics, and the input and output characteristic of the frequency-voltage conversion circuit may be adjusted based on a delay time periodxe2x80x94power supply voltage characteristic which is obtained by synthesizing the plurality of different delay time periodxe2x80x94power supply voltage characteristics.
The frequency-voltage conversion circuit may have a plurality of delay circuits corresponding to the plurality of different delay time periodxe2x80x94power supply voltage characteristics, and each of the plurality of delay circuits may be configured to allow the delay time periodxe2x80x94power supply voltage characteristic to be adjustable.
The frequency-voltage conversion circuit may be configured so that a slope and an offset amount of the input and output characteristic of the frequency-voltage conversion circuit are adjustable.
A method according to the present invention is a method for adjusting an input and output characteristic of a frequency-voltage conversion circuit in a system including a target circuit which operates in accordance with a clock and the frequency-voltage conversion circuit for receiving the clock as an input and providing a voltage in accordance with a frequency of the clock as an operating voltage for the target circuit, the method comprising the steps of adjusting a slope of the input and output characteristic of the frequency-voltage conversion circuit based on the operating voltage for the target circuit measured with respect to a plurality of frequencies of the clock; and adjusting an offset amount of the input and output characteristic of the frequency-voltage conversion circuit so that the target circuit is operable within a prescribed frequency range of the clock. Thus, the above-described objectives are achieved.
The frequency-voltage conversion circuit may include an input pulse signal generation circuit for generating an input pulse signal having a pulse width representing a target delay amount in accordance with the frequency of the clock; a delay circuit for delaying the input pulse signal, the delay circuit outputting a pulse signal obtained by delaying the input pulse signal as an output pulse signal; and a delay amount-voltage conversion circuit for outputting a voltage corresponding to the target delay amount based on the amount of the output pulse signal with respect to the input pulse signal and supplying the voltage to the delay circuit; the delay circuit delaying the input pulse signal in accordance with the voltage which is output from the delay amount-voltage conversion circuit. The slope of the input and output characteristic of the frequency-voltage conversion circuit is adjusted by adjusting a slope of a delay time periodxe2x80x94power supply voltage characteristic of the delay circuit. The offset amount of the input and output characteristic of the frequency-voltage conversion circuit is adjusted by adjusting an offset amount of the delay time periodxe2x80x94power supply voltage characteristic of the delay circuit.
The delay circuit may include a first delay block which operates in accordance with the voltage which is output from the delay amount-voltage conversion circuit and a second delay block which operates in accordance with a prescribed fixed voltage. The first delay block may include a plurality of first delay units. The second delay block may include a plurality of second delay units. A slope of the delay time periodxe2x80x94power supply voltage characteristic of the delay circuit may be adjusted by adjusting a stage number of the first delay units, among the plurality of first delay units through which the input pulse signal passes. An offset amount of the delay timer periodxe2x80x94power supply voltage characteristic of the delay circuit may be adjusted by adjusting a stage number of the second delay units, among the plurality of second delay units through which the input pulse signal passes.
The frequency-voltage conversion circuit may include an input pulse signal generation circuit for generating an input pulse signal having a pulse width representing a target delay amount in accordance with the frequency of the clock; a delay circuit for delaying the input pulse signal, the delay circuit outputting a pulse signal obtained by delaying the input pulse signal as an output pulse signal; and a delay amount-voltage conversion circuit for outputting a voltage corresponding to the target delay amount based on the delay amount of the output pulse signal with respect to the input pulse signal and supplying the voltage to the delay circuit; the delay circuit delaying the input pulse signal in accordance with the voltage which is output from the delay amount-voltage conversion circuit. The slope and the offset amount of the input and output characteristic of the frequency-voltage conversion circuit may be adjusted by adjusting the pulse width of the input pulse signal as a function of the frequency of the clock.
The function may be represented by Pw=xcex1/f+xcex2, where Pw is the pulse width of the input pulse signal, f is the frequency of the clock, and xcex1 and xcex2 are constants. The slope of the input and output characteristic of the frequency-voltage conversion circuit may be adjusted by adjusting a value of xcex1. The offset amount of the input and output characteristic of the frequency-voltage conversion circuit may be adjusted by adjusting a value of xcex2.
An apparatus according to the present invention is an apparatus for automatically adjusting an input and output relationship of a frequency-voltage conversion circuit in a system including a target circuit which operates in accordance with a clock and the frequency-voltage conversion circuit for receiving the clock as an input and providing a voltage in accordance with a frequency of the clock as an operating voltage for the target circuit, the apparatus comprising self-diagnosis means for determining whether or not the target circuit normally operates in the relationship between the operating voltage and the frequency of the clock; and adjustment means for adjusting the input and output relationship of the frequency-voltage conversion circuit based on the determination result of the self-diagnosis means. Thus, the above-described objectives are achieved.
The self-diagnosis means may include operating means for operating the target circuit with respect to an input vector for realizing a maximum delay path of the target circuit; and comparison means for comparing an output from the target circuit with respect to the input vector with a prescribed expected value with respect to the input vector.
The adjustment means may include means for adjusting a slope of an input and output characteristic of the frequency-voltage conversion circuit; and means for adjusting an offset amount of the input and output characteristic of the frequency-voltage conversion circuit.
The apparatus and the system may be formed on a single semiconductor chip.